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EE452: System on Chip Design II - Module Level: N/A - Directly owned by: EE - Electrical & Electronic Engineering

FTE (Full Time Equivalent) Teaching Input
Department Input (%)
EE - Electrical & Electronic Engineering 100.00

Assessment Information - EE452 First and Second Sittings - Show First Sitting Only
Sitting Examination
Period
Code Duration
(HH:MM)
Announced
(HH:MM)
Assessment Title/Type
First Semester 2 EE452-1 2:00 2:00 SYSTEM ON CHIP DESIGN II - PAPER 1 - WRITTEN
Paper released to public: NO . Release date for this period was: 03/07/2015.
First Semester 2 EE452-CA1 N/A N/A System on Chip Design II-Continuous Assessment 1
Sitting Examination
Period
Code Duration
(HH:MM)
Announced
(HH:MM)
Assessment Title/Type
Second Autumn EE452-1 2:00 2:00 SYSTEM ON CHIP DESIGN II - PAPER 1 - WRITTEN
Paper released to public: NO . Release date for this period was: 09/10/2015.
Second Autumn EE452-CA1 N/A N/A System on Chip Design II-Continuous Assessment 1

Syllabii Entries All Entries - Show Only Entries with Students
Faculty Instance Course
Levels
Results
Entry
Level
Level 1 Level 2 Students for
1st/2nd sittings
Module ECTS Type Teaching Period Module ECTS Type Teaching Period
AR 1OA1 1 1 EE452 5 Optional Semester 2 N/A 0 0
EN 4BLE1 1 1 EE452 5 Core Semester 2 N/A 23 3
EN 4BN1 1 1 EE452 5 Repeat Only Semester 2 N/A 0 0
EN 4BP1 1 1 EE452 5 Core Semester 2 N/A 22 5
SC 1SWB1 1 1 EE452 5 Optional Semester 2 N/A 1 0
Total syllabi entries: 5 Total number of students per sitting: 46 8


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